// ******************************************************************************
// Copyright     :  Copyright (C) 2020, Hisilicon Technologies Co. Ltd.
// File name     :  oq_reg_offset.h
// Project line  :  Platform And Key Technologies Development
// Department    :  CAD Development Department
// Author        :  xxx
// Version       :  1.0
// Date          :  2013/3/10
// Description   :  The description of xxx project
// Others        :  Generated automatically by nManager V5.1
// History       :  xxx 2020/01/20 15:07:14 Create file
// ******************************************************************************

#ifndef OQ_REG_OFFSET_H
#define OQ_REG_OFFSET_H

/* QU_OQ_CSR Base address of Module's Register */
#define CSR_QU_OQ_CSR_BASE (0x8000)

/* **************************************************************************** */
/*                      QU_OQ_CSR Registers' Definitions                            */
/* **************************************************************************** */

#define CSR_QU_OQ_CSR_QU_VERSIONS_REG (CSR_QU_OQ_CSR_BASE + 0x0)              /* 版本寄存器 */
#define CSR_QU_OQ_CSR_OQ_MODE_REG (CSR_QU_OQ_CSR_BASE + 0x4)                  /* OQ operation mode register */
#define CSR_QU_OQ_CSR_OQ_MODE1_REG (CSR_QU_OQ_CSR_BASE + 0x8)                 /* OQ operation mode register */
#define CSR_QU_OQ_CSR_OQ_DESENQ_CFG_REG (CSR_QU_OQ_CSR_BASE + 0xC)            /* disable队列配置 */
#define CSR_QU_OQ_CSR_OQ_PTHRU_CFG_REG (CSR_QU_OQ_CSR_BASE + 0x10)            /* pass-through配置 */
#define CSR_QU_OQ_CSR_OQ_PTHRU_BD_CTR_WIN_CFG_REG (CSR_QU_OQ_CSR_BASE + 0x14) /* pass-through带宽限制窗口配置 */
#define CSR_QU_OQ_CSR_OQ_PTHRU_BD_CTR_MAX_PTHU_CFG0_REG \
    (CSR_QU_OQ_CSR_BASE + 0x18) /* max pthu-paket in window config */
#define CSR_QU_OQ_CSR_OQ_PTHRU_BD_CTR_MAX_PTHU_CFG1_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1C) /* max pthu-paket in window config */
#define CSR_QU_OQ_CSR_OQ_PTHRU_BD_CTR_MAX_PTHU_CFG2_REG \
    (CSR_QU_OQ_CSR_BASE + 0x20) /* max pthu-paket in window config */
#define CSR_QU_OQ_CSR_OQ_PTHRU_BD_CTR_MAX_PTHU_CFG3_REG \
    (CSR_QU_OQ_CSR_BASE + 0x24) /* max pthu-paket in window config */
#define CSR_QU_OQ_CSR_OQ_PTHRU_BD_CTR_MAX_PTHU_CFG4_REG \
    (CSR_QU_OQ_CSR_BASE + 0x28) /* max pthu-paket in window config */
#define CSR_QU_OQ_CSR_OQ_PTHRU_BD_CTR_MAX_PTHU_CFG5_REG \
    (CSR_QU_OQ_CSR_BASE + 0x2C) /* max pthu-paket in window config */
#define CSR_QU_OQ_CSR_OQ_PTHRU_BD_CTR_MAX_PTHU_CFG6_REG \
    (CSR_QU_OQ_CSR_BASE + 0x30)                                       /* max pthu-paket in window config */
#define CSR_QU_OQ_CSR_OQ_FIFO_AF_CFG0_REG (CSR_QU_OQ_CSR_BASE + 0x34) /* oq fifo almost-full waterline config */
#define CSR_QU_OQ_CSR_OQ_FIFO_AF_CFG1_REG (CSR_QU_OQ_CSR_BASE + 0x38) /* oq fifo almost-full waterline config */
#define CSR_QU_OQ_CSR_OQ_FIFO_AF_CFG2_REG (CSR_QU_OQ_CSR_BASE + 0x3C) /* oq fifo almost-full waterline config */
#define CSR_QU_OQ_CSR_OQ_FIFO_AE_CFG0_REG (CSR_QU_OQ_CSR_BASE + 0x40) /* oq fifo almost-empty waterline config */
#define CSR_QU_OQ_CSR_OQ_FIFO_AE_CFG1_REG (CSR_QU_OQ_CSR_BASE + 0x44) /* oq fifo almost-empty waterline config */
#define CSR_QU_OQ_CSR_OQ_FIFO_AE_CFG2_REG (CSR_QU_OQ_CSR_BASE + 0x48) /* oq fifo almost-empty waterline config */
#define CSR_QU_OQ_CSR_OQ_HST01_COALESCING_WATERMARK_REG (CSR_QU_OQ_CSR_BASE + 0x4C) /* OQ_HST01_COALESCING_WATERMARK \
                                                                                     */
#define CSR_QU_OQ_CSR_OQ_HST23_COALESCING_WATERMARK_REG (CSR_QU_OQ_CSR_BASE + 0x50) /* OQ_HST23_COALESCING_WATERMARK \
                                                                                     */
#define CSR_QU_OQ_CSR_OQ_HST0_COALESCING_WATCHDOG_EXP_REG \
    (CSR_QU_OQ_CSR_BASE + 0x54) /* OQ_HST0_COALESCING_WATCHDOG_EXP */
#define CSR_QU_OQ_CSR_OQ_HST1_COALESCING_WATCHDOG_EXP_REG \
    (CSR_QU_OQ_CSR_BASE + 0x58) /* OQ_HST1_COALESCING_WATCHDOG_EXP */
#define CSR_QU_OQ_CSR_OQ_HST2_COALESCING_WATCHDOG_EXP_REG \
    (CSR_QU_OQ_CSR_BASE + 0x5C) /* OQ_HST2_COALESCING_WATCHDOG_EXP */
#define CSR_QU_OQ_CSR_OQ_HST3_COALESCING_WATCHDOG_EXP_REG \
    (CSR_QU_OQ_CSR_BASE + 0x60)                                         /* OQ_HST3_COALESCING_WATCHDOG_EXP */
#define CSR_QU_OQ_CSR_OQ_AGING_HOST_CFG_REG (CSR_QU_OQ_CSR_BASE + 0x64) /* OQ_AGING_HOST_CFG */
#define CSR_QU_OQ_CSR_OQ_AGING_NET_CFG_REG (CSR_QU_OQ_CSR_BASE + 0x68)  /* 网络侧队列老化配置 */
#define CSR_QU_OQ_CSR_OQ_WRR_WEIGHT_CFG_REG (CSR_QU_OQ_CSR_BASE + 0x6C) /* OQ入口的WRR权重配置 */
#define CSR_QU_OQ_CSR_OQ_NREAL_DEQ_DPL_LEN_REG \
    (CSR_QU_OQ_CSR_BASE + 0x70) /* OQ出队DPL=0时，配置plen给ESCH，用于调度权重刷新。 */
#define CSR_QU_OQ_CSR_OQ_LATENCY_CFG_REG (CSR_QU_OQ_CSR_BASE + 0x74)     /* oq的时延采样DFX配置 */
#define CSR_QU_OQ_CSR_OQ_LATENCY_STA_REG (CSR_QU_OQ_CSR_BASE + 0x78)     /* oq的时延采样DFX状态 */
#define CSR_QU_OQ_CSR_OQ_SAMPLE_TMR_REG (CSR_QU_OQ_CSR_BASE + 0x7C)      /* oq的时延采样DFX时间 */
#define CSR_QU_OQ_CSR_OQ_INT_VECTOR_REG (CSR_QU_OQ_CSR_BASE + 0x84)      /* 中断向量 */
#define CSR_QU_OQ_CSR_OQ_INT_REG (CSR_QU_OQ_CSR_BASE + 0x88)             /* 中断状态 */
#define CSR_QU_OQ_CSR_OQ_INT_EN_REG (CSR_QU_OQ_CSR_BASE + 0x8C)          /* 中断使能 */
#define CSR_QU_OQ_CSR_OQ_INT0_STICKY_REG (CSR_QU_OQ_CSR_BASE + 0x90)     /* 中断0的sticky信息 */
#define CSR_QU_OQ_CSR_OQ_INT1_STICKY_REG (CSR_QU_OQ_CSR_BASE + 0x94)     /* 中断1的sticky信息 */
#define CSR_QU_OQ_CSR_OQ_INT2_STICKY_REG (CSR_QU_OQ_CSR_BASE + 0x98)     /* 中断2的sticky信息 */
#define CSR_QU_OQ_CSR_OQ_INT3_STICKY_REG (CSR_QU_OQ_CSR_BASE + 0x9C)     /* 中断3的sticky信息 */
#define CSR_QU_OQ_CSR_OQ_INT4_STICKY_REG (CSR_QU_OQ_CSR_BASE + 0xA0)     /* 中断4的sticky信息 */
#define CSR_QU_OQ_CSR_OQ_INT5_STICKY_REG (CSR_QU_OQ_CSR_BASE + 0xA4)     /* 中断5的sticky信息 */
#define CSR_QU_OQ_CSR_OQ_INT6_STICKY_REG (CSR_QU_OQ_CSR_BASE + 0xA8)     /* 中断6的sticky信息 */
#define CSR_QU_OQ_CSR_OQ_INDRECT_CTRL_REG (CSR_QU_OQ_CSR_BASE + 0xAC)    /* 间接寻址控制寄存器 */
#define CSR_QU_OQ_CSR_OQ_INDRECT_TIMEOUT_REG (CSR_QU_OQ_CSR_BASE + 0xB0) /* OQ间接寻址timeout水线配置 */
#define CSR_QU_OQ_CSR_OQ_INDRECT_DAT0_REG \
    (CSR_QU_OQ_CSR_BASE + 0xB4) /* OQ memory indirect access write data or read data. */
#define CSR_QU_OQ_CSR_OQ_INDRECT_DAT1_REG \
    (CSR_QU_OQ_CSR_BASE + 0xB8) /* OQ memory indirect access write data or read data. */
#define CSR_QU_OQ_CSR_OQ_INDRECT_DAT2_REG \
    (CSR_QU_OQ_CSR_BASE + 0xBC) /* OQ memory indirect access write data or read data. */
#define CSR_QU_OQ_CSR_OQ_INDRECT_DAT3_REG \
    (CSR_QU_OQ_CSR_BASE + 0xC0) /* OQ memory indirect access write data or read data. */
#define CSR_QU_OQ_CSR_OQ_FIFO_FILL0_REG (CSR_QU_OQ_CSR_BASE + 0xC4)                /* FIFO内数据个数 */
#define CSR_QU_OQ_CSR_OQ_FIFO_FILL1_REG (CSR_QU_OQ_CSR_BASE + 0xC8)                /* FIFO内数据个数 */
#define CSR_QU_OQ_CSR_OQ_FIFO_FILL2_REG (CSR_QU_OQ_CSR_BASE + 0xCC)                /* FIFO内数据个数 */
#define CSR_QU_OQ_CSR_OQ_MEM_INIT_DONE_REG (CSR_QU_OQ_CSR_BASE + 0xD0)             /* 所有mem在init完成后拉高 */
#define CSR_QU_OQ_CSR_OQ_CSR_STLFQ_DSP_PACKET_CNT_REG (CSR_QU_OQ_CSR_BASE + 0xD4)  /* 从stlfq进入OQ的报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ0_DSP_PACKET_CNT_REG (CSR_QU_OQ_CSR_BASE + 0xD8) /* 从stffq0进入OQ的报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ1_DSP_PACKET_CNT_REG (CSR_QU_OQ_CSR_BASE + 0xDC) /* 从stffq1进入OQ的报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STLIQ_FP_PACKET_CNT_REG (CSR_QU_OQ_CSR_BASE + 0xE0)   /* 从stliq进入OQ的报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFIQ_FP_PACKET_CNT_REG (CSR_QU_OQ_CSR_BASE + 0xE4)   /* 从stfiq进入OQ的报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ0_BI_DSP_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0xE8) /* 从stffq0进入OQ的bi_dsp报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ1_BI_DSP_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0xEC) /* 从stffq1进入OQ的bi_dsp报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STLFQ_REP_INFO_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0xF0) /* 从stlfq 通过复制报文进入OQ的指令个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STLFQ_DSP_TSO12_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0xF4) /* 从stlfq进入OQ的tso1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ0_DSP_TSO12_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0xF8) /* 从stffq0进入OQ的tso1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ1_DSP_TSO12_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0xFC) /* 从stffq1进入OQ的tso1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFIQ_FP_TSO12_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x100) /* 从stfiq进入OQ的tso1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STLFQ_DSP_LRO12_NETWORK_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x104) /* 从stlfq进入OQ,到网络侧队列的lro1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ0_DSP_LRO12_NETWORK_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x108) /* 从stffq0进入OQ,到网络侧队列的lro1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ1_DSP_LRO12_NETWORK_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x10C) /* 从stffq1进入OQ,到网络侧队列的lro1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFIQ_FP_LRO12_NETWORK_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x110) /* 从stfiq进入OQ,到网络侧队列的lro1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STLFQ_DSP_LRO12_HOST_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x114) /* 从stlfq进入OQ,到主机侧队列的lro1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ0_DSP_LRO12_HOST_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x118) /* 从stffq0进入OQ,到主机侧队列的lro1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ1_DSP_LRO12_HOST_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x11C) /* 从stffq1进入OQ,到主机侧队列的lro1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFIQ_FP_LRO12_HOST_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x120) /* 从stfiq进入OQ,到主机侧队列的lro1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STLFQ_DSP_TSO3_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x124) /* 从stlfq进入OQ的tso3报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ0_DSP_TSO3_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x128) /* 从stffq0进入OQ的tso3报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ1_DSP_TSO3_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x12C) /* 从stffq1进入OQ的tso3报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFIQ_FP_TSO3_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x130) /* 从stfiq进入OQ的tso3报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STLFQ_DSP_LRO3_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x134) /* 从stlfq进入OQ的lro3报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ0_DSP_LRO3_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x138) /* 从stffq0进入OQ的lro3报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ1_DSP_LRO3_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x13C) /* 从stffq1进入OQ的lro3报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFIQ_FP_LRO3_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x140) /* 从stfiq进入OQ的lro3报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STLFQ_DSP_REP_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x144) /* 从stlfq进入OQ的复制报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ0_DSP_REP_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x148) /* 从stffq0进入OQ的复制报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ1_DSP_REP_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x14C)                                                  /* 从stffq1进入OQ的复制报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STLFQ_DSP_LREP_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x150)  /* 从stlfq进入OQ的lrep指令个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ0_DSP_LREP_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x154) /* 从stffq0进入OQ的lrep指令个数统计 \
                                                                                   */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ1_DSP_LREP_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x158) /* 从stffq1进入OQ的lrep指令个数统计 \
                                                                                   */
#define CSR_QU_OQ_CSR_OQ_CSR_OREP_REP_CNT_ADD_INC_REG \
    (CSR_QU_OQ_CSR_BASE + 0x15C) /* oq通过orep接口向prm发送触发rep_cnt++的指令个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_OREP_LREP_INC_REG \
    (CSR_QU_OQ_CSR_BASE + 0x160) /* oq通过orep接口向prm发送的lrep指令个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STLFQ_DROP_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x164) /* 从stlfq进入OQ的丢弃报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ0_DROP_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x168) /* 从stffq0进入OQ的丢弃报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ1_DROP_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x16C) /* 从stffq1进入OQ的丢弃报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STLIQ_FP_DROP_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x170) /* 从stliq进入OQ的丢弃报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFIQ_FP_DROP_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x174)                                             /* 从stfiq进入OQ的丢弃报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_MDP_PACKET_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x178) /* oq通过mdp接口收到的报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_HRQ_PACKET_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x17C) /* oq通过hrq_fifo的主机侧报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_HRQ_DROP_PACKET_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x180) /* oq通过hrq_fifo的丢弃报文个数统计 \
                                                                                   */
#define CSR_QU_OQ_CSR_OQ_CSR_NRQ_PACKET_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x184) /* oq通过nrq_fifo的网络侧报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_RQC_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x188)        /* oq通过RQC接口向ESCH请求查询的次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_RQC_RVLD_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x18C) /* oq通过RQC接口收到ESCH查询结果的次数统计 \
                                                                            */
#define CSR_QU_OQ_CSR_OQ_CSR_HOST_PTHRU_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x190)    /* oq主机侧报文pass-through个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_NETWORK_PTHRU_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x194) /* oq网络侧报文pass-through个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_NETWORK_CHECK_DROP_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x198) /* oq网络侧通过drop-tail和wred丢弃的报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_NETWORK_DISSENQ_DROP_PACKET_REG \
    (CSR_QU_OQ_CSR_BASE + 0x19C) /* oq网络侧由于disable队列丢弃的报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_PIE_CHECK_DROP_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1A0) /* oq PIE接口由于drop-tail丢弃的报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_HOST_DISSENQ_DROP_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1A4)                                      /* oq主机侧由于disable队列丢弃的报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_EQS_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x1A8) /* oq发起EQS次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_DQR_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1AC) /* oq收到的DQR次数统计该次数=ESCH发起的调度次数 + OQ的drop报文个数； */
#define CSR_QU_OQ_CSR_OQ_CSR_NOT_REAL_DEQ_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1B0) /* oq出队失败次数统计。oq假出队会影响调度带宽和调度shaper精度。 */
#define CSR_QU_OQ_CSR_OQ_CSR_DEQ_EMPTY_QUEUE_REG (CSR_QU_OQ_CSR_BASE + 0x1B4) /* ESCH对oq发起空调度的次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_DEQ_BP_BY_PRM_ICD_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1B8) /* 主机侧队列或者网络侧lb队列向PRM预扣被反压次数计数器。 */
#define CSR_QU_OQ_CSR_OQ_CSR_DEQ_BP_BY_PRM_DCD_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1BC) /* 主机侧队列换src时，向PRM释放资源被反压次数计数器。 */
#define CSR_QU_OQ_CSR_OQ_CSR_DEQ_BP_BY_STFIQ_LB_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1C0) /* 主机侧队列向STFIQ lb时，被STFIQ反压次数计数器。 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFIQ_OQ_FCNP_BP_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1C4) /* STFIQ对OQ的FCNP反压周期计数器，正常情况该计数器应当为0 */
#define CSR_QU_OQ_CSR_OQ_CSR_CPBTX_BP_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1C8) /* CPB对OQ的TX方向反压周期计数器，正常情况该计数器应当为0 */
#define CSR_QU_OQ_CSR_OQ_CSR_CPBRX_BP_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1CC) /* CPB对OQ的RX方向反压周期计数器，正常情况该计数器应当为0 */
#define CSR_QU_OQ_CSR_OQ_CSR_DQS_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x1D0)        /* oq发起DQS的次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_ENQ_PACKET_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x1D4) /* oq发起入队的次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_ENQ_HOST_2K_QUEUE_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1D8) /* oq向主机侧2K个队列发起入队次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_ENQ_HOST_PIE_QUEUE_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1DC) /* oq向PIE队列发起入队的次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_ENQ_HOST_DDR_QUEUE_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1E0) /* oq向DDR队列发起入队的次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_ENQ_HOST_LOOPBACK_QUEUE_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1E4) /* oq向主机侧loopback队列发起入队的次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_ENQ_NETWORK_4K_QUEUE_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1E8) /* oq向网络侧4K个队列发起入队的次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_ENQ_NETWORK_LOOPBACK_QUEUE_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1EC) /* oq向网络侧loopback队列发起入队的次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_ENQ_DROP_QUEUE_PACKET_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x1F0)                                              /* oq向丢弃队列发起入队的次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_TPD_TO_CITF_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x1F4) /* oqm向citf发送的pd次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_TID_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x1F8)         /* oqm发起tid操作的次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STP_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x1FC)         /* oqm发起stp操作的次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ0_FCNP_REG (CSR_QU_OQ_CSR_BASE + 0x200)     /* stffq0发起fcnp操作次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STFFQ1_FCNP_REG (CSR_QU_OQ_CSR_BASE + 0x204)     /* stffq1发起fcnp操作次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_STLFQ_FCNP_REG (CSR_QU_OQ_CSR_BASE + 0x208)      /* stlfq发起fcnp操作次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_OQ_ESCH_FCNP_REG (CSR_QU_OQ_CSR_BASE + 0x20C)    /* oq向ESCH发起fcnp指令次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_OQ_STFIQ_FCNP_REG \
    (CSR_QU_OQ_CSR_BASE + 0x210) /* oq向stfiq发起fcnp task-event队列入队的请求次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_EPD_TO_CPB_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x214) /* oq向cpb发送的报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_EPD_TSO12_TO_NETWORK_CPB_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x218) /* oq向cpb发送的网络侧tso1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_EPD_LRO12_TO_NETWORK_CPB_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x21C) /* oq向cpb发送的网络侧lro1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_EPD_LRO12_TO_HOST_CPB_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x220) /* oq向cpb发送的主机侧lro1/2报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_EPD_TSO3_TO_CPB_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x224) /* oq向cpb发送的tso3报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_EPD_LRO3_TO_CPB_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x228) /* oq向cpb发送的lro3报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_EPD_TSO12_PIECE_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x22C) /* oq向cpb发送的tso1/2分片个数统计 \
                                                                                   */
#define CSR_QU_OQ_CSR_OQ_CSR_EPD_LRO12_PIECE_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x230) /* oq向cpb发送的lro1/2分片个数统计 \
                                                                                   */
#define CSR_QU_OQ_CSR_OQ_CSR_EPD_DMARCND_TO_CPB_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x234)                                                 /* oq向cpb发送的dmarcmd报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_EPD_REP_TO_CPB_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x238) /* oq向cpb发送的复制报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_DROP_TO_CPB_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x23C)    /* oq向cpb发送的丢弃报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_DPL_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x240)            /* oq向ESCH发起的DPL次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_OLB_TO_IQ_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x244)      /* oq向iq发送OLB的报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_DISABLE_EPD_TO_CPB_CNT_REG \
    (CSR_QU_OQ_CSR_BASE + 0x248)                                       /* citf模块由于配置，没有发给cpb的报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_PRLS_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x24C) /* oq由于丢弃复制报文，向prm发起prls的次数统计 \
                                                                        */
#define CSR_QU_OQ_CSR_OQ_CSR_ICD_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x250)  /* oq向prm发起预扣次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_DCD_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x254)  /* oq向prm发起释放次数统计 */
#define CSR_QU_OQ_CSR_OQ_CSR_PTHRU_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x258)    /* citf模块收到的pass-through报文个数统计 */
#define CSR_QU_OQ_CSR_OQ_MEM_ECC_1BIT_CNT_REG (CSR_QU_OQ_CSR_BASE + 0x25C) /* oq内部RAM发生1BIT ECC的次数 */
#define CSR_QU_OQ_CSR_OQ_CSR_DROP_QUEUE_DEPTH_REG (CSR_QU_OQ_CSR_BASE + 0x260) /* DROP队列深度 */
#define CSR_QU_OQ_CSR_OQ_BP_STATUS_REG (CSR_QU_OQ_CSR_BASE + 0x264)            /* OQ受到的所有反压状态 */

#endif // OQ_REG_OFFSET_H
